For technical publications related to the present invention, see (1) the reference “A New Low-Power Driver for Portable Devices,” by H. Tsuchi, N. Ikeda and H. Hayama, SID 00 DIGEST pp. 146-149, and (2) the specification of Japanese Patent Kokai Publication JP-A-2000-33846.
FIG. 24 is a diagram illustrating one example of a driver circuit for driving video digital data in a liquid crystal display device [see FIG. 1 in reference (1)].
The buffer shown in FIG. 24 is such that even if a full-range output cannot be produced with an analog buffer alone, a full-range output is made possible by switching between two analog buffer circuits (referred to simply as “buffer circuits” below) The term “full-range output” refers to substantially the entire area of the range of power supply voltage of the driver circuit As shown in FIG. 24, a first buffer circuit 1010 comprises a first changeover switch 1041 having a stationary end, which is connected to an input terminal 1001, and first and second switching terminals; a first constant-current source 1013 connected serially between the first switching terminal of the first changeover switch 1041 and a high-potential power supply VDD; a P-channel MOS transistor 1011 having a source, which is connected to the first terminal of the first changeover switch 1041, and a gate and drain that are tied together; a second constant-current source 1014 connected between the drain of the P-channel MOS transistor 1011 and a low-potential power supply VSS; a second changeover switch 1042 having a stationary end, which is connected to an output terminal 1002, and first and second switching terminals; a third constant-current source 1015 connected serially between the first switching terminal of the second changeover switch 1042 and the high-potential power supply VDD; and a P-channel MOS transistor 1012 having a source connected to the first terminal of the second changeover switch 1042, a gate connected to the gate of the P-channel MOS transistor 1011, and a drain connected to the low-potential power supply VSS.
A second buffer circuit 1020 comprises a fourth constant-current source 1023 connected between the low-potential power supply VSS and the second switching terminal of the first changeover switch 1041 whose fixed end is connected to the input terminal 1001; an N-channel MOS transistor 1021 having a source, which is connected to the second terminal of the first changeover switch 1041, and a gate and drain that are tied together; a fifth constant-current source 1024 connected between the drain of the N-channel MOS transistor 1021 and the high-potential power supply VDD; a sixth constant-current source 1025 connected serially between the low-potential power supply VSS and the second switching terminal of the second changeover switch 1042 whose stationary end is connected to the output terminal 1002; and an N-channel MOS transistor 1022 having a source connected to the second terminal of the second changeover switch 1042, a gate connected to the gate of the N-channel MOS transistor 1021, and a drain connected to the high-potential power supply VDD.
The buffer further includes a precharging circuit 1030, which comprises a switch 1031 between the output terminal 1002 and the high-potential power supply VDD, and a switch 1032 between the output terminal 1002 and the low-potential power supply VSS, for pre-discharging and precharging, the output terminal 1002.
FIG. 25 illustrates the structure of a 6-bit digital-data driver [see FIG. 3 in reference (1)]. The driver comprises a shift register 1100, a data register 1110, a latch 1120, a level shifter circuit 1130, an R-DAC 1160 (a reference-voltage generator 1150 and ROM decoder 1140), and the new buffer 1170. Analog voltage is supplied from the ROM decoder 1140 to the new buffer 1170, 1-bit data (D00, D10 and D20) of each 6-bit data set of R, G, B is supplied from the ROM decoder 1140 to the new buffer 1170, the precharging circuit 1030 supplies the data line with a suitable power supply voltage (VDD, VSS) based upon the single bit of data, and the switches 1041 and 1042 are selected to select the buffer circuit 1010 or 1020.
If the driver circuit shown in FIG. 24 is applied to a common-inversion drive liquid crystal display circuit (drive in which opposing-electrode voltage Vcom is inverted), little power is consumed, Such a driver circuit is ideal for driving the liquid crystal display device of a mobile terminal such as a cellular telephone terminal. Further, by using a driver circuit that produces a full-range output, power consumption can be reduced further by lowering the power supply voltage. The driver circuit of FIG. 24 is one which can produce a full-range output by switching between the first buffer circuit 1010 and second buffer circuit 1020.
The first buffer circuit 1010 and second buffer circuit 1020 have a limitation imposed upon their operating ranges owing to the threshold voltage Vth of their transistors. The changeover between the first buffer circuit 1010 and second buffer circuit 1020 must be performed in a voltage range (Vlim1 to Vlim2) in which both of these buffer circuits operate.
If conditions such as ambient temperature are fixed, switching between the first buffer circuit 1010 and second buffer circuit 1020 in accordance with video digital data can perform driving.
In order to facilitate an understanding of the present invention, changeover between the buffer circuits 1010 and 1020 in a case where the driver circuit shown in FIG. 24 is used to drive the data line of a liquid crystal display panel will be described with reference to FIG. 6
FIG. 6A is a diagram useful in describing a liquid crystal gamma characteristic (grayscale and signal voltage) and driver-circuit operating range (in the standard state) in common inversion drive (where potential Vcom of opposing electrodes of a liquid crystal display device is switched between a high-potential voltage source and a low-potential voltage source). In FIG. 6A and in similar diagrams below, it will be assumed that the grayscale level has one-to-one correspondence with video digital data and that each grayscale is associated with two analog voltages corresponding to polarity. FIG. 6B is a diagram useful in describing a liquid crystal gamma characteristic and driver-circuit operating range (at the time of gamma modulation) in common inversion drive.
The operating range of a first analog buffer (which corresponds to the first buffer circuit 1010 of FIG. 24) is a voltage of 2 to 5V (which corresponds to grayscale 24 to 63 in positive polarity and grayscale 0 to 56 in negative polarity ), the operating range of a second analog buffer (which corresponds to the second buffer circuit 1020 of FIG. 24) is a voltage of 0 to 3V (which corresponds to grayscale 0 to 56 in positive polarity and grayscale 24 to 63 in negative polarity ), and the range in which drive changeover is possible is a voltage of 2 to 3V Even if operation of the first and second analog buffers is changed over at level 32 using one higher-order bit of video digital data, for example, the voltage at changeover (the input voltage corresponding to the video digital data) for each of the positive and negative polarities is within the range in which the first and second analog buffers are capable of operating. As a result, an analog voltage corresponding to the grayscale level can be output.
Accordingly, in the case of the liquid crystal gamma characteristic (grayscale and voltage characteristic) of the kind shown in FIG. 6A, the first and second analog buffers can be changed over at grayscale level 32 by one higher-order bit of video digital data.
However, in the case of a gamma characteristic of the kind shown in FIG. 6B, the voltage of grayscale level 32 in the characteristic (solid line) of positive polarity is outside the operating range of the first analog buffer (which corresponds to the first buffer circuit 1010 of FIG. 24), and the voltage of grayscale level 32 in the characteristic (dashed line) of negative polarity is outside the operating range of the second analog buffer (which corresponds to the second buffer circuit 1020 of FIG. 24). This means that a changeover can no longer be performed at level 32. In other words, if the operating range of a first analog buffer is a voltage of 2 to 5V (grayscale levels 24 to 63), the operating range of a second analog buffer is a voltage of 0 to 3V (grayscale levels 24 to 63) and the first and second buffers are changed over at level 32, then the output of the first analog buffer will be fixed to voltage Vlim1 between levels 32 to 48 with regard to positive polarity and the output of the second analog buffer will be fixed to voltage Vlim2 between levels 32 to 48 with regard to negative polarity. That is, even if a video digital signal corresponding to grayscale levels 32 to 48 is input between grayscale levels 32 to 48, an analog voltage corresponding to these levels will not be output and so-called a skip in grayscale levels occurs. It should be noted that FIG. 6B illustrates an example of a case where modulation of the gamma characteristic is approximately the same for both the positive and negative polarities. However, it is readily understood that modulation that differs depending upon polarity also may occur.
In order to support operation under a wide range of temperatures as in the case of a mobile terminal or the like, various types of modulation are required. For example, display quality is maintained by modulating the gamma characteristic with respect to temperature, and power consumption is suppressed by modulating power supply voltage. A problem that arises in such cases is that a fixed changeover between buffers conforming to some specific video digital data(some specific grayscale level) cannot be carried out.